“Our straight strategy of combining structural Boundary Scan and functional processor emulation test on a single platform has been welcomed by many customers. The newly available real-time level even improves this synergy significantly”, says Thomas Wenzel, Managing Director of GOEPEL electronic’s Boundary Scan Division. “Once again we set new performance standards in this area, offering users even more opportunities to implement innovative test strategies for their complex high-speed designs.”
Utilizing VarioTAP means the conversion of the integrated processor to a native design embedded test and programming controller. In addition to Boundary Scan (IEEE Std. 1149.x),the strategy named Processor Emulation Test (PET) is the most modern method in the area of embedded test access technologies at the moment, enabling the functional at-speed test of all peripheral micro controller interfaces, such as RAM, I/O, bus interfaces etc. 
Test programs based on the Meta Language FMC (Functional Micro Code) are essential elements. FMC is portable, enabling a processor independent, algorithmic generation of bus vectors. The new option allows the code’s real-time execution directly in the target processor, which significantly increases the processing speed compared to conventional methods.
The use of VarioTAP does not require expert background knowledge, additional development tools or processor-specific pods, which makes the implementation easy and uncomplicated.
To date, more than 500 different processors from Altera, ARM, Atmel, Infineon, Freescale, Intel, NXP, Renesas, Samsung, ST Micro, Texas Instruments, Xilinx and many more are currently supported.
The new VarioTAP features are supported as standard starting from SYSTEM CASCON version 4.6, and are activated by the license manager in the system software. Shipping will start in late November 2011, being complementarily available for users with valid maintenance contract. SYSTEM CASCON is a professional JTAG/Boundary Scan development environment, developed by GOEPEL electronic with currently 45 completely integrated in-system programming (ISP), test, design validation and debug tools.