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News - Board and System Test28.4 Gb/s Multiplexer enables accurate Characterization of Receivers10 July 2013 – Agilent Technologies introduced a 28.4-Gb/s multiplexer with optional de-emphasis with up to eight taps for R&D and test engineers who need to characterize receivers for next-generation servers, storage systems and data-center networks. The multiplexer expands the pattern generator bit rate of the J-BERT N4903B high-performance bit error ratio tester. To manage the increasing demand for higher bandwidth, lower power consumption and increased interconnect reach, many new network interface standards are emerging, along with new backplane, active cable, storage and proprietary interfaces. Physical bit rates of approximately 25-Gb/s NRZ (non-return-to-zero data format for one lane) are common in the latest industry standards such as IEEE 802.3 100-Gb Ethernet, CFP2, OIF CEI and 32-G Fibre Channel. Design and test engineers who need to characterize 25-Gb/s receiver ports face one big challenge: margins are getting extremely tight. To achieve repeatable test results and sufficient design margins, test equipment must be ultraprecise. Most electrical 25-Gb/s interfaces use multitap de-emphasis transmitters to compensate for the signal degradations of the channel. Receiver testing requires an error detector to ensure the receiver can properly detect received bits even under worst-case signal conditions. The stress is emulated by a pattern generator with timing jitter and level interference injection capabilities. Agilent’s M8061A 28-Gb/s multiplexer with optional de-emphasis enables the most accurate receiver characterization for server and other data-center interfaces. “We are pleased to offer our customers another expansion of our industry-leading J-BERT to help them address the test challenges of up to 28-Gb/s designs,” said Juergen Beck, general manager of Agilent’s Digital Photonic Test Division. “Once again, we have demonstrated our commitment to enabling R&D teams to release robust, high-speed digital designs for the next generation of server and data-center infrastructure.” The M8061A 28.4-Gb/s multiplexer with optional de-emphasis delivers the most accurate and repeatable receiver characterization results because of the built-in and unique eight-tap de-emphasis, which allows engineers to emulate transmitter de-emphasis and channels and compensate losses in the test setup. The M8061A is transparent to jitter from J-BERT and provides additional clock/2 jitter injection capabilities. The unique, built-in superposition of level interference eliminates the need for external power splitters that can cause level and signal degradations. The M8061A allows engineers to characterize next-generation computing buses operating above 14 Gb/s and data-center I/Os. When engineers use the M8061A with J-BERT N4903B, they can generate loopback training sequences. The M8061A’s DC-coupled output allows engineers to generate unbalanced bit patterns without level drift, and it can be switched to an electrical idle state for computer bus receiver tests such as those required for PCI Express®. The 28-Gb/s multiplexer with de-emphasis option can be added to an existing J-BERT test setup to allow 28-Gb/s measurements with minimal investment. The equipment can be used to test multiple-gigabit test applications, such as PCIe®, USB, SATA, QPI, Hypertransport, Thunderbolt, DisplayPort, SD UHS-II, MIPI™ M-PHY, backplanes, 10-Gb Ethernet and 100-Gb Ethernet, SFP+ and CFP2 interfaces. www.agilent.com/find/M8061A/ Related Articles: |
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