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Cost-Efficient Wafer-Level Testing of Mixed Semiconductor Memories

Advantest T582204 July 2017 - Advantest launched the T5822 memory tester, the newest member of its T5800 product series, optimized for wafer-level testing of DRAMs, NAND devices and other non-volatile memories used throughout portable electronic devices. The new tester offers high-voltage resources such a level driver and DC testing capability along with an economical compact test head. It also features a powerful memory repair analysis (MRA) capability to help customers maximize their yields.

With mobile applications booming, semiconductor manufacturers need low-cost solutions for high-volume testing of a wide range of price-sensitive memory ICs. The T5822 is designed to provide manufacturers of multiple memory devices with cost efficiency and optimal functionality, including full test coverage of as many as 1,536 devices in parallel with data transfer rates up to 1.2 gigabits per second (Gbps).

Using Advantest's FutureSuite operating system, the system is compatible with test programs for a wide range of memory devices. With output voltages from -10 volts to 13 volts, it provides the flexibility and economic performance to handle low-pin-count to high-pin-count devices.

In addition, the T5822 has the same modular architecture as its predecessors, providing users with a seamless transition from any other T5800 series tester.

"The T5822 is an optimal mixed-memory test solution, enhancing customers' ROI while also reducing risk," said Masuhiro Yamada, executive officer at Advantest Corporation.

www.advantest.com/



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