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Background: Pulse Testing for emerging Non-Volatile Memory Technologies

09.April 2013 - Peter J. Hulbert, product and applications development engineer for Keithley Instruments, explains the principles of pulse testing for electrical characterization of emerging non-volatile memory technologies (NVM). NVM technologies like phase-change memory (PCM/PRAM), charge trap flash (CTF/SONOS), resistive memory (ReRAM), ferro-electric memory (FeRAM), magneto-resistive memory (MRAM), and others might soon replace the conventional floating-gate flash memory technology used in digital cameras, MP3 players, and smartphones.

With floating gate flash memory, electrical characterization was traditionally performed using DC instruments, such as source measurement unit (SMU) instruments, after pulse generators had programmed and/or erased the memory cell. This required a switch to apply the DC or pulse signal alternately to the test device. Occasionally, oscilloscopes were used to verify pulse fidelity (pulse width, overshoot, pulse voltage level, rise time, fall time) at the device under test (DUT). Measuring the pulse is important because the flash memory state is quite sensitive to the pulse voltage level. However, even in research, the use of oscilloscopes was relatively rare because the required setup for oscilloscope measurements differed from that for the pulse source/DC measure approach. Even when scopes were used for flash characterization, the complexity of measuring the transient current meant that voltage was the only measurement taken while pulsing.

The challenge for researchers has been to find an integrated approach to measuring current and voltage simultaneously while applying pulses to a memory device or material. Although this was possible previously, it required integrating a rack of instruments, writing software to coordinate their operation, and accepting various tradeoffs related to cost, performance, and complexity. These custom systems typically had to be created and maintained by an in-house test instrumentation expert who had the skills, experience, and time necessary to integrate the various instruments into a workable pulse source-and-measure system. Although functional, these “in-house” systems were typically one-off creations with limited test envelopes and cumbersome test controls and required time-consuming data extraction.  The measurement approach typically used a load or sense resistor with an oscilloscope or digitizer to measure the current. This is a proven technique, but the effect of the load resistor on the voltage delivered to the device had significant downsides for many pulse measurements. Also, correlation across multiple systems and obtaining traceable system-level calibration was effectively impossible.

Fortunately, new instrumentation capabilities make it possible to measure current and voltage simultaneously with a single instrument while applying precisely controlled pulses. These new tools offer researchers additional data to gain a better understanding of NVM material and device behavior in less time. Applying pulses while simultaneously measuring the voltage and current with high speed sampling provides greater insight into the electrical and physical mechanisms that provide the memory behavior. Adding this transient characterization capability to DC characterization provides fundamental data on intrinsic material properties and device response.

The newest instrumentation approaches, such as the Keithley Model 4200-SCS parametric analyzer configured with the Model 4225-PMU ultra-fast I-V module, simplify characterizing the electrical behavior of experimental NVM devices by measuring current and voltage simultaneously while applying precisely controlled pulses.

Electrical characterization is crucial to a better understanding of the physical aspects of the underlying technology. Regardless of the particular memory technology under investigation, pulsing is required to exercise the switching behavior. Pulsing with simultaneous measurement provides the data necessary to understand the dynamic behavior of the switching mechanism. Different memory technologies use different terms to describe similar actions or methods. For example, the terms program/erase, set/reset, and write/erase are used to indicate the fundamental storage of a 1 or 0 bit. These write/erase procedures are done in a pulse mode to provide the overall speed required for typical memory operations and simulate the final product environment.

A variety of test requirements are common to many NVM technologies:

•             The need for dynamic, simultaneous ultra-fast current and voltage measurement is driven by emerging NVM technologies like phase-change and ferro-electric memory. New instrumentation provides simultaneous voltage and current measurement while pulsing, which is important when the dynamic resistance of the material represents the electrical manifestation of the physical mechanism of the bit storage.

•             Pulse amplitude is the required pulse height used to program and erase the memory cell. Floating gate memory can require 15–20V, or even greater, during the write pulse. Most NVM candidates require 3–5V. The goal for replacement NVM technologies is lower pulse amplitudes, but early research prior to any dimensional scaling or material optimization can require 6–8V. Many technologies require bipolar pulses at these voltage levels, but some recent pulse I-V solutions do not provide these higher voltages when used in a bipolar sourcing mode.

•             Pulse amplitude fidelity is critical because memory state switching behaviors are non-linear; therefore, these devices are sensitive to the amplitude of the voltage pulse. Pulse amplitude fidelity parameters are specified in terms of pulse level accuracy, ringing, overshoot, and undershoot. Minimizing ringing, overshoot, and undershoot is critical to the pulse instrument’s design. Modern pulse I-V systems can provide overshoot and ringing specifications of 3% or less. In addition to accurate pulse levels, newer NVM technologies require the ability to create and adjust complex waveforms. For example, ReRAM device testing often requires pulse sweep up/sweep down profiles while simultaneously measuring the current. FeRAM testing requires the PUND (Positive, Up, Negative, Down) four-pulse sequence. The new NVM memory technologies require the ability to output multi-pulse waveforms consisting of arbitrary segments, together with multiple measurements within each waveform):

•             Pulse timing parameters, such as rise time, fall time, and pulse width in test equipment will continue to be very important, especially with the general trend toward faster pulsing, with pulse widths trending from 100ns down to <10ns.

•             As NVM devices become smaller and smaller, characterization requires the ability to measure smaller currents while pulsing, which calls for a low current, fast response amplifier for the current measurement. To minimize parasitic effects of the cable capacitance and precisely control the amount of energy to the DUT, a remote pulse amplifier, connected very close to the DUT, is advantageous, especially for phase change memory (PCM) and ReRAM characterization.

•             Current compliance or current control is important for testing NVM technologies like ReRAM and PRAM. Usually, this is done using DC instruments and sometimes implemented in custom pulse setups. It is not clear that the current compliance in DC instrumentation is providing sufficiently fast control of the current to meet the typical requirements. For pulsing current control, it is desirable to install the current control device as close as possible to the DUT to prevent current from the interconnect capacitance from discharging into the DUT.

•             A system’s ability to switch quickly between pulse and DC instruments is critical. Switching to DC instrumentation allows SMUs to characterize the memory device, which is important for flash memory and other memory technologies. In addition to switching from pulse to DC, switching one or more device terminals to a high impedance state is useful for flash testing.  This high impedance state is used during the erase portion of flash program/erase cycles for endurance testing, which means that the switching must be done fast enough to occur between the program and erase pulses to allow for a very large number of program/erase cycles in a short period of time. This type of switch should be controlled directly by the pulse generator and located within the pulse instrument for fast control. Typically, this switching is performed by a solid state relay (SSR) for each pulse channel.

•             Channel synchronization is necessary for NVM testing that requires multiple pulse source and measure channels. Although traditional pulse instruments are difficult to synchronize, modern pulse I-V instruments offer internal trigger routing and automatic synchronization in addition to the integrated measurement capability.

Emerging NVM materials and device types require electrical characterization that traditionally has not been available or required custom in-house test systems, which had limited capabilities. New instrumentation is now available that provides pulse sourcing with simultaneous measurement that permits characterization of the underlying switching behavior that is key to understanding NVM performance.

www.keithley.com/

The full article can be downloaded as PDF in our Whitepaper Library.



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